This article originally appeared in My little (home) shop thread on Practical Machinist.
I only worked on the CPU board schematic a few minutes today, but I finished all the address decoding logic.
The 8088 only has 20 address lines, of that, 16 of them are used for addressing segments of 64KB each. The address lines A16 through A19 are used as card selects to talk to the peripheral cards. There is a 4 to 16 line decoder that takes the upper nibble of the CPU address, then converts that to a selector that is 1 of 16 lines on the bus. Fadal repurposed a bunch of address and logic lines to make these card selects.
A 20bit address is represented as 5 hex nibbles, like 0xFBC00, that’s segment 15, address BC00. That happens to correspond to the video memory on the video card. The first F selects card 15, which is the video card (we are talking base 0 numbers here, so 0-15), the BC00 selects the base address within the F segment. The F segment also contains the system ROM, which is located at FE000-FFFFF, an 8KB chunk. The video ram is only 1KB, so it occupies addresses FBC00-FBFFF.
It would seem that the memory expansion cards occupy a card select range, though I’m not certain exactly where the memory and NC executive ROMs are mapped yet. Once I have the schematic completed and the system ROM reverse engineered, I could design my own memory expansion card.
Continue reading “Fadal 1400-1 CPU Card Reverse Engineering and Schematic”